An important issue in Seven segment display is heat, but the reversible logic gives less amount of heat dissipation. So, it’s an important role in nanotechnology, less energy complementary metal oxide semiconductor CMOS designs etc. Seven segment displays are most effective devices used in electronic meters, digital calculators, clock radios, digital clocks, odometers, displays in home appliances, etc.In this project, an efficient seven segment display is designed using reversible logic gates CNOT, FREDKIN and PERES gates. Retrievability is a feature which every electronic device wants to posses , In reversible logic gates the inputs and outputs can be retrievable from each other. Backward operation is used in this circuit which allows to retrieve the inputs from the outputs therefore consuming zero power. Reversible logic circuits are also known as lossless circuits, which has neither information loss nor energy loss. The reversible logic operations dissipate less heat and can\'t erase information.
Seven segment displays are most effective devices used in electronic meters, digital calculators, clock radios, digital clocks, odometers, displays in home appliances, etc. An important issue in Seven segment display is heat, but the reversible logic gives less amount of heat dissipation. So, it’s an important role in nanotechnology, less energy complementary metal oxide semiconductor CMOS designs etc. Retrievability is a feature which every electronic device wants to posses , In reversible logic gates the inputs and outputs can be retrievable from each other. Backward operation is used in this circuit which allows to retrieve the inputs from the outputs therefore consuming zero power. Reversible logic circuits are also known as lossless circuits, which has neither information loss nor energy loss. The reversible logic operations dissipate zero heat and can't erase information.
II. REVERSIBLE LOGIC
A reversible logic gate is an n-input n-output logic device with one-to-one mapping. This helps to determine the outputs from the inputs and also the inputs can be uniquely recovered from the outputs. Also in the synthesis of reversible circuits direct fan-out is not allowed as one–to-many concept is not reversible. However fan-out in reversible circuits is achieved using additional gates. A reversible circuit should be designed using minimum number of reversible logic gates.
IV. ADVANTAGES & DISADVANTAGES OFREVERSIBLE LOGIC GATES
The main advantages of Reversible gates are reduced power consumption and low latency found useful in Quantum computing. Its low power consumption and quicker operation makes them to be useful in applications Microprocessors, DSP processors and Quantum computers.The main disadvantage is high number of constant inputs is used. Hence it has scope on improvement. Improvement on following the basic rule for Reversible Gates, i.e number of inputs should equal the number of outputs is possible by optimizing the constant inputs and garbage outputs.
V. RESULT & ANALYSIS
A. RTL Schematic
The RTL schematic is abbreviated as the register transfer level it denotes the blue print of the architecture and is used to verify the designed architecture to the ideal architecture that we are in need of development .The hdl language is used to convert the description or summery of the architecture to the working summery by use of the coding language i.e verilog. The RTL schematic even specifies the internal connection blocks for better analyzing .The figure represented below shows the RTL schematic diagram of the designed architecture.
B. Technology Schematic
The technology schematic makes the representation of the architecture in the LUT format, where the LUT is consider as the parameter o area that is used in VLSI to estimate the architecture design .the LUT is consider as an square-unit the memory allocation of the code is represented in there LUTs in FPGA .
The simulation is the process which is termed as the final verification in respect to its working whereas the schematic is the verification of the connections and blocks. The simulation window is launched as shifting from implantation to the simulation on the home screen of the tool ,and the simulation window confines the output in the form of the wave forms. Here it has the flexibility of providing the different radix number systems.
We hereby express our sincere gratitude to the HOD of Electronics and Communication Engineering, Prof. G. Srikanth for providing us seamless knowledge and support over past one year and for providing right suggestions at every phase for successful completion of project. We express our sincere gratitude to our guide Assoc. Prof. SK. DILSHAD, Department of Electronics and Communication Engineering, for her constant guidance and for providing required guidance as internal guide for result-oriented implementation of ideas relevant to my project.
The main design parameter that VLSI engineers need to bother when designing with the integrated circuits is energy loss and information loss. This project has presented the design methodologies of a compact seven segment display using reversible logic gates. The proposed design efficiency has been proved with simulation analysis. By comparative analysis the proposed circuit has been constructed with low quantum cost, optimum number of gates, less power and garbage values. As the better than the other circuits this seven segment display using reversible gates has zero amount of heat dissipation and zero amount of information loss that means neither information loss nor energy loss. As the circuit performance is better than the other circuits this type circuits can be used in many electronic applications.
 “Prerana P. Autade; Satish M. Turkane; Anupama A. Deshpande”, “Design of Multipliers using Reversible Logic and Toffoli Gates”, ISBN:978-1-6654-0073-20,DOI: 10.1109/ESCI53509.2022.9758329, March 2022 .
 “Landauer Rolf”, “Irreversibility and heat generation in the computing process”, IBM Journal of Research and Development, Volume 44, No. 1.2, pp: 261,269, doi: 10.1147/rd.441.0261, January. 2022.
 “Bennett C.H.”, “Logical Reversibility of Computation”, IBM Journal of Research and Development, Volume 17, No. 6, pp: 525,532, doi: 10.1147/rd.176.0525, April - 2022.
 “Ruqaiya Khanam; Abdul Rahman; Pushpam”, “Review on reversible logic circuits and its application”, International Conference on Computing, Communication and Automation (ICCCA), Volume 2, Issue 1, ISSN:2231-3133, May - 2021.
 “Morrison, M.; Ranganathan, N.”, \"Design of a Reversible ALU Based on Novel Programmable Reversible Logic Gate Structures,\" VLSI (ISVLSI), IEEE Computer Society Annual Symposium on ,Volume 29, pp: 126,131 IEEE, doi: 10.1109/ISVLSI.30, July - 2021.
 “Gopi Chand Naguboina, K. Anusudha”, “Design and Synthesis of Combinational Circuits Using Reversible Decoder in Xilinx” IEEE International Conference, Volume 5, pp:233,237, ISBN 10: 0070273553 / ISBN 13: 9780070273559, January - 2020.
 “Min-Lun Chuang, Chun-Yao Wang”, “Synthesis of Reversible Sequential Elements” Design Automation Conference ASPDAC \'07. Asia and South Pacific, Volume 30, No. 6, pp:420,425, doi: 10.1109/ASPDAC.207.358022, January - 2020.
 “Souvik Majumder; Shreya Bhattacharyya; Papiya Debnath; Manash Chanda”, “Power Delay Analysis of CMOS Reversible Gates for Low Power Application”, International Conference on Computational Performance Evaluation (ComPE), INSPEC Accession Number: 19986458, DOI: 10.1109/ComPE49325.2020.9200136, July 2020.
 “Yelekar. P.R., Chiwande. S.S.”, “Design of sequential circuit using reversible logic” Advances in Engineering, Science and Management (ICAESM), International Conference, Volume 9, No. 21, pp: 321,326, March - 2019.
 “Hardik Shah, Arpit Rao, Mayuresh Deshpande, Ameya Rane, Siddhesh Nagvekar”, “Implementation of high speed low power combinational and sequential circuits using reversible logic” International Conference on Advances in Electrical Engineering