Implementation of Full Adder Circuit using Pass Transistor Logic

Abstract

Advances in Complementary Metal Oxide Semiconductor scaling techniques have led to the proliferate usage of multimedia devices such as laptops, mobiles, graphic cards, personal digital assistants etc. In all these applications, the low power, low die size and high-speed fundamental adder architectures are essential. Various algorithms such as fast-fourier, discrete cosine transforms and inverse discrete cosine transform are used. To implement these algorithms, adders with enhanced performance features such as low area and high-speed computation are vital and necessary. Several adder architectures are available for different applications. In this paper, a ten-transistor using CMOS Exclusive OR and Exclusive NOR gates in combination is proposed. The full adder logic circuit is designed and simulated in cadence virtuoso too environment and operated a dc voltage of 1.5V in 180nm process technology. The proposed full adder logic circuit on an average operates at less power when compared to the conventional CMOS logic full adder circuit. The propagation delay performance was also slightly better when compared to previous circuit. Both the full adder logic simulations have been carried for multiple dc voltages and performance analysis has been carried out at the end of the paper.

Introduction

The text discusses the need for low-power and high-speed arithmetic circuits in modern CMOS-based integrated systems, where full adders play a critical role in digital signal processing and multimedia applications. As device scaling advances, optimizing power consumption, delay, and chip area has become essential. Traditional CMOS full adders provide reliable operation but suffer from high transistor counts and increased power usage.

To address these limitations, various alternative designs such as pass transistor logic (PTL), transmission gate logic, and hybrid approaches have been explored. PTL is highlighted as an efficient technique because it reduces transistor count and power consumption by using transistors as switches to pass logic signals. However, it suffers from issues like threshold voltage drop and signal degradation, often requiring restoration circuits.

The proposed work introduces a compact full adder design using CMOS-based XOR and XNOR combinations implemented through PTL. The design aims to minimize transistor count while maintaining low power and acceptable delay. It is implemented and simulated using Cadence Virtuoso in 180 nm technology at a 1.5 V supply.

Simulation results show that the proposed full adder achieves about 14% reduction in power consumption compared to conventional CMOS full adders, along with slightly improved propagation delay. The design is also tested across different supply voltages to verify robustness.

Conclusion

In this paper, a low-power full adder circuit based on Pass Transistor Logic has been presented. The proposed design utilizes efficient PTL-based XOR/XNOR structures to reduce transistor count, power consumption, and propagation delay. The circuit was implemented and simulated using Cadence Virtuoso in 180 nm CMOS technology at a supply voltage of 1.5 V. Simulation results demonstrate that the proposed PTL full adder achieves lower average power consumption and improved power-delay product compared to conventional CMOS and transmission gate based full adders. These characteristics make the proposed design well suited for low-power VLSI applications such as portable devices and arithmetic-intensive circuits. The proposed design successfully balances the trade-off between power efficiency and signal integrity, making it suitable for integration into low-power digital systems. The outcomes of this work highlight the importance of logic style selection in achieving energy-efficient VLSI designs.

References

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Copyright

Copyright © 2026 Shaik Roqhya Banu, Dr. D Srinivasulu Reddy , Dr. K.Lokesh Krishna , Thimmisetty Divya Sree , Udayagiri Manohar, R Yaswanth . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.