Two-Timescale Modelling of a Single-Inductor Dual-Input DC-DC Converter: Power Sharing, Output Ripple and Stability of the Averaged Plant

Abstract

A single-inductor dual-input single-output (DISO) DC-DC converter shares one inductor between two sources by time-division scheduling. When the sources lie on opposite sides of the regulated output, the converter alternates between step-down and step-up operation within every scheduling frame. This paper develops a two-timescale model in which the switching-period-averaged models of the two modes are combined over the frame. The model gives closed-form relations for the delivery ratio that sets the required inductor current, the power share produced by a given time allocation, the quantisation of that allocation by the digital control period, and the output ripple on the frame and switching timescales. For fixed duties and positive parameters, the continuous-conduction frame-averaged model is globally exponentially stable about its unique equilibrium. For a 14.3 V / 5.0 V to 6.7 V converter with a 250 µs frame, a 70 % time allocation gives a 76.35 % power share. In 75 controller-free simulations spanning allocation, load and scheduling period, the relations predicted the mean inductor current within 0.0113 % and the power share within 0.0555 %, and the frame-rate ripple within 4.7 %, in every case slightly overestimating it. A switched model confirms the frame-rate ripple of the switching-period-averaged output and shows that the instantaneous terminal voltage carries an additional switching-frequency step of about R_esr•i_L during step-up intervals, which raises its peak-to-peak ripple by a factor of 2.5–2.8.

Introduction

The study focuses on the modelling and analysis of a single-inductor dual-input, single-output (DISO) DC–DC converter designed to combine two different energy sources, such as a battery and a photovoltaic panel, into one regulated output. Conventional multi-input converters often use separate inductors for each source, increasing component count, size, and cost. A single-inductor design reduces hardware duplication but introduces challenges because the converter must operate in both step-down (buck) and step-up (boost) modes.

The main objective of the research is to develop and validate an accurate mathematical model that considers the changing operating modes and the relationship between source time allocation and actual power contribution. In time-division multiplexing (TDM), each source uses the shared inductor during a specified time interval. However, the fraction of time allocated to a source does not directly equal its share of the output power because the sources operate at different voltages and use different current paths.

The literature review examines multi-input and multiport converter topologies, switching-period averaging, time-multiplexed control, and hybrid energy systems. Previous studies demonstrate the advantages of shared-inductor converters, but conventional models often treat operating modes separately and do not fully account for the short scheduling intervals, power-sharing differences, and output-voltage ripple associated with switching between sources.

The proposed methodology develops a two-timescale averaged model that combines the buck and boost operating modes over the scheduling frame. It derives steady-state duty-cycle equations, establishes the relationship between time allocation and power delivery, analyses output-voltage ripple, and investigates the stability of the fixed-duty averaged system. The converter model includes a primary source of 14.3 V, an auxiliary source of 5 V, a regulated output of 6.7 V, a 180 µH inductor, and a 22 mF output capacitor. The switching frequency is 50 kHz, while the scheduling frequency is 4 kHz.

During buck operation, the higher-voltage primary source supplies the output through the inductor. During boost operation, the lower-voltage auxiliary source stores energy in the inductor and subsequently transfers it to the output. The shared inductor and output capacitor influence current continuity, power delivery, and voltage ripple during these transitions.

The study also examines the stability of the fixed-duty, frame-averaged model and validates its mathematical relationships through controller-free simulations across a 75-point parameter grid and a switched converter model. The evaluation considers modelling accuracy and differences between averaged and switched responses. Importantly, the research does not design or compare feedback controllers; its stability result applies specifically to the fixed-duty averaged plant.

In conclusion, the research provides a mathematical modelling framework for understanding the behaviour of single-inductor DISO converters under time-division scheduling. By accounting for operating-mode transitions, source power sharing, and output-voltage ripple, the proposed model supports more accurate analysis and design of compact multi-source power converters for renewable energy and hybrid power systems.

Conclusion

A time-division scheduled single-inductor DISO converter changes its plant structure twice per frame, and a frame contains only a few switching periods. Averaging the step-down and step-up models over the frame gives three design relations — the delivery ratio ?, the power share S as a function of the time allocation ?, and the allocation quantisation T_s/T_TDM — and a two-timescale description of the output ripple. With fixed duties and positive parameters, the continuous-conduction frame-averaged model is globally exponentially stable about its unique equilibrium. For the 14.3 V / 5.0 V to 6.7 V converter studied, a 70 % time allocation gives a 76 % power share, so the share must be regulated explicitly if it matters. Over 75 controller-free operating points the relations predicted the inductor current within 0.0113 %, the power share within 0.0555 % and the frame-rate ripple within 4.7 %, conservatively. The ripple has two parts: a frame-rate part set by the stored charge and the ESR step at each mode change, and, in the instantaneous terminal voltage, a switching-frequency ESR step during step-up intervals that raises the peak-to-peak value by a factor of 2.5–2.8. The study is a simulation study with fixed duties that shares its plant equations with the derivation; closed-loop and switched-system stability, three or more sources and hardware confirmation of the instantaneous ripple are left for future work. The simulation code (model, sweep, switched-model, stability and figure scripts) and the result files from which every table and figure was generated are available from the corresponding author on request

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Copyright

Copyright © 2026 Narendra P. Zinjad, Deepak S. Bankar. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.